Bachelorarbeit von Johannes Arnold
Abstract
With the advent of the “zettabyte era” in the mid-2010s, power consumption has become an
increasing topic of interest as the number of computer systems continues to rise, affecting large
datacenters and consumer grade devices as well as embedded systems. Energy monitoring and
estimation has a significant impact on a number of key areas, including compiler optimization,
scheduling, thermal- and battery life management, as well as potential long-term economical
and environmental consequences.
While many contemporary CISC platforms incorporate features such as RAPL to estimate
power consumption, estimating the power consumed by a RISC processor often presents a
greater challenge in the absence of specialized hardware extensions, particularly in the context
of embedded systems.
This thesis examines the time and power consumption characteristics of a common embedded
RISC‑V processor using a diverse set of algorithms representative of an embedded system. It
employs a bespoke benchmarking framework designed around the collection of PMC data.
The data is then subjected to analysis and transformation, and used to train and evaluate a
generalized model, thereby enabling the prediction of the system’s power consumption from
PMC data alone.
The final model was able to predict the SoC’s current draw with an error of around 0.88 %
when using data from benchmarks it was not trained on. This outcome provides compelling
evidence that PMC data can be effectively employed for the aforementioned use cases. The
correlations identified from PMC benchmarking data are then aligned with the tracing framework
of a contemporary RTOS, which could also benefit from run-time energy statistics.